[remotelaboratory][master] 894b7938,d64d218d,9db454fa,eb6afe10

fpga/serial/common/remote_access.v

diff --git a/fpga/serial/common/remote_access.v b/fpga/serial/common/remote_access.v

index 9afdbf2..b7f0592 100644

--- a/fpga/serial/common/remote_access.v

+++ b/fpga/serial/common/remote_access.v

@@ -151,35 +151,39 @@

 		led_segment_bus_latch = led_segment_bus;

 		led_digit_select_latch = led_digit_select;

+		if (led_digit_select_latch[0] == 1) begin

+			digit_blanker_1 = digit_blanker_1 + 1;

+		end

+		if (led_digit_select_latch[1] == 1) begin

+			digit_blanker_2 = digit_blanker_2 + 1;

+		end

+		if (led_digit_select_latch[2] == 1) begin

+			digit_blanker_3 = digit_blanker_3 + 1;

+		end

+		if (led_digit_select_latch[3] == 1) begin

+			digit_blanker_4 = digit_blanker_4 + 1;

+		end

 		if (led_digit_select_latch[0] == 0) begin

 			led_display_bytes[0] = led_segment_bus_latch;

 			digit_blanker_1 = 0;

-			digit_blanker_2 = digit_blanker_2 + 1;

-			digit_blanker_3 = digit_blanker_3 + 1;

-			digit_blanker_4 = digit_blanker_4 + 1;

end

 		if (led_digit_select_latch[1] == 0) begin

 			led_display_bytes[1] = led_segment_bus_latch;

-			digit_blanker_1 = digit_blanker_1 + 1;

 			digit_blanker_2 = 0;

-			digit_blanker_3 = digit_blanker_3 + 1;

-			digit_blanker_4 = digit_blanker_4 + 1;

end

 		if (led_digit_select_latch[2] == 0) begin

 			led_display_bytes[2] = led_segment_bus_latch;

-			digit_blanker_1 = digit_blanker_1 + 1;

-			digit_blanker_2 = digit_blanker_2 + 1;

 			digit_blanker_3 = 0;

-			digit_blanker_4 = digit_blanker_4 + 1;

end

 		if (led_digit_select_latch[3] == 0) begin

 			led_display_bytes[3] = led_segment_bus_latch;

-			digit_blanker_1 = digit_blanker_1 + 1;

-			digit_blanker_2 = digit_blanker_2 + 1;

-			digit_blanker_3 = digit_blanker_3 + 1;

 			digit_blanker_4 = 0;

end

fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v

diff --git a/fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v b/fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v

index 3c7fa0f..44b1ff5 100644

--- a/fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v

+++ b/fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v

@@ -1,104 +1,104 @@

-// This file is part of the Universal Laboratory (uLab)

-//

-// © 2007 - 2019 Raptor Engineering, LLC

-// All Rights Reserved

-//

-// Licensed under the terms of the AGPL v3

-module guest_fpga_top(clk, reset, four_bit_input, four_bit_output, eight_bit_input, eight_bit_output, sixteen_bit_input, sixteen_bit_output, lcd_data_in_address, lcd_data_in_data, lcd_data_in_enable, led_segment_bus, led_digit_select);

-	input clk;

-	input reset;

-	input [3:0] four_bit_input;

-	output reg [3:0] four_bit_output;

-	input [7:0] eight_bit_input;

-	output reg [7:0] eight_bit_output;

-	input [15:0] sixteen_bit_input;

-	output reg [15:0] sixteen_bit_output;

-	output reg [5:0] lcd_data_in_address;

-	output reg [7:0] lcd_data_in_data;

-	output reg lcd_data_in_enable;

-	output reg [7:0] led_segment_bus;

-	output reg [3:0] led_digit_select;

-	reg [7:0] lcd_sample_counter = 48;							// Create a sample LCD display counter register

-	reg [31:0] lcd_character_change_timer = 0;						// Wait a certain number of cycles before loading a new character

-	reg [5:0] lcd_current_character = 0;							// The current character's address

-	always @(posedge clk) begin

-		four_bit_output = four_bit_input;						// Loopback

-		eight_bit_output = eight_bit_input[3:0] + eight_bit_input[7:4];			// Sample adder

-		sixteen_bit_output = sixteen_bit_input[15:8] * sixteen_bit_input[7:0];		// Sample multiplier

-		// Sample LCD display routine

-		lcd_data_in_address = lcd_current_character;					// Character location on the LCD display

-		lcd_data_in_data = lcd_sample_counter;						// Character code to display

-		lcd_data_in_enable = 1;								// Enable data transmission

-		// Cycle through all character positions

-		lcd_current_character = lcd_current_character + 1;

-		if (lcd_current_character > 31) begin

-			lcd_current_character = 16;

-		end

-		// Cycle through the numbers 0 to 9 at one second intervals

-		lcd_character_change_timer = lcd_character_change_timer + 1;

-		if (lcd_character_change_timer > 6000000) begin					// Wait one second in between character changes

-			lcd_character_change_timer = 0;

-			lcd_sample_counter = lcd_sample_counter + 1;

-			if (lcd_sample_counter > 57) begin					// Character code for the digit 9

-				lcd_sample_counter = 48;					// Character code for the digit 0

-			end

-		end

-	end

-	// 7-segment LED display driver clock generator

-	reg sseg_clock;

-	reg [4:0] sseg_clock_counter;

-	always @(posedge clk) begin

-		sseg_clock_counter = sseg_clock_counter + 1;

-		if (sseg_clock_counter > 16) begin

-			sseg_clock_counter = 0;

-			sseg_clock = ~sseg_clock;

-		end

-	end

-	// 7-segment LED display driver

-	// led_segment_bus and led_digit_select are active low

-	// The bit sequence, MSB to LSB, is dp a b c d e f g

-	// Segment letters are taken from ug130.pdf page 15

-	// 0: 8'b10000001

-	// 1: 8'b11001111

-	// 2: 8'b10010010

-	// 3: 8'b10000110

-	reg [2:0] current_anode;

-	always @(posedge sseg_clock) begin

-		current_anode = current_anode + 1;

-		if (current_anode > 3) begin

-			current_anode = 0;

-		end

-		case (current_anode)

-			0: begin

-				led_digit_select = 4'b1110;

-				led_segment_bus = 8'b10000001;

-			end

-			1: begin

-				led_digit_select = 4'b1101;

-				led_segment_bus = 8'b11001111;

-			end

-			2: begin

-				led_digit_select = 4'b1011;

-				led_segment_bus = 8'b10010010;

-			end

-			3: begin

-				led_digit_select = 4'b0111;

-				led_segment_bus = 8'b10000110;

-			end

-		endcase

-	end

-endmodule

+// This file is part of the Universal Laboratory (uLab)

+//

+// © 2007 - 2019 Raptor Engineering, LLC

+// All Rights Reserved

+//

+// Licensed under the terms of the AGPL v3

+module guest_fpga_top(clk, reset, four_bit_input, four_bit_output, eight_bit_input, eight_bit_output, sixteen_bit_input, sixteen_bit_output, lcd_data_in_address, lcd_data_in_data, lcd_data_in_enable, led_segment_bus, led_digit_select);

+	input clk;

+	input reset;

+	input [3:0] four_bit_input;

+	output reg [3:0] four_bit_output;

+	input [7:0] eight_bit_input;

+	output reg [7:0] eight_bit_output;

+	input [15:0] sixteen_bit_input;

+	output reg [15:0] sixteen_bit_output;

+	output reg [5:0] lcd_data_in_address;

+	output reg [7:0] lcd_data_in_data;

+	output reg lcd_data_in_enable;

+	output reg [7:0] led_segment_bus;

+	output reg [3:0] led_digit_select;

+	reg [7:0] lcd_sample_counter = 48;							// Create a sample LCD display counter register

+	reg [31:0] lcd_character_change_timer = 0;						// Wait a certain number of cycles before loading a new character

+	reg [5:0] lcd_current_character = 0;							// The current character's address

+	always @(posedge clk) begin

+		four_bit_output = four_bit_input;						// Loopback

+		eight_bit_output = eight_bit_input[3:0] + eight_bit_input[7:4];			// Sample adder

+		sixteen_bit_output = sixteen_bit_input[15:8] * sixteen_bit_input[7:0];		// Sample multiplier

+		// Sample LCD display routine

+		lcd_data_in_address = lcd_current_character;					// Character location on the LCD display

+		lcd_data_in_data = lcd_sample_counter;						// Character code to display

+		lcd_data_in_enable = 1;								// Enable data transmission

+		// Cycle through all character positions

+		lcd_current_character = lcd_current_character + 1;

+		if (lcd_current_character > 31) begin

+			lcd_current_character = 16;

+		end

+		// Cycle through the numbers 0 to 9 at one second intervals

+		lcd_character_change_timer = lcd_character_change_timer + 1;

+		if (lcd_character_change_timer > 6000000) begin					// Wait one second in between character changes

+			lcd_character_change_timer = 0;

+			lcd_sample_counter = lcd_sample_counter + 1;

+			if (lcd_sample_counter > 57) begin					// Character code for the digit 9

+				lcd_sample_counter = 48;					// Character code for the digit 0

+			end

+		end

+	end

** Diff limit reached (max: 250 lines) **

894b7938	2019-04-29 02:58:15	Timothy Pearson
Correctly implement 7-segment display LED persistence
M fpga/serial/common/remote_access.v
fpga/serial/common/remote_access.v diff --git a/fpga/serial/common/remote_access.v b/fpga/serial/common/remote_access.v index 9afdbf2..b7f0592 100644 --- a/fpga/serial/common/remote_access.v +++ b/fpga/serial/common/remote_access.v @@ -151,35 +151,39 @@ led_segment_bus_latch = led_segment_bus; led_digit_select_latch = led_digit_select; + if (led_digit_select_latch[0] == 1) begin + digit_blanker_1 = digit_blanker_1 + 1; + end + + if (led_digit_select_latch[1] == 1) begin + digit_blanker_2 = digit_blanker_2 + 1; + end + + if (led_digit_select_latch[2] == 1) begin + digit_blanker_3 = digit_blanker_3 + 1; + end + + if (led_digit_select_latch[3] == 1) begin + digit_blanker_4 = digit_blanker_4 + 1; + end + if (led_digit_select_latch[0] == 0) begin led_display_bytes[0] = led_segment_bus_latch; digit_blanker_1 = 0; - digit_blanker_2 = digit_blanker_2 + 1; - digit_blanker_3 = digit_blanker_3 + 1; - digit_blanker_4 = digit_blanker_4 + 1; end if (led_digit_select_latch[1] == 0) begin led_display_bytes[1] = led_segment_bus_latch; - digit_blanker_1 = digit_blanker_1 + 1; digit_blanker_2 = 0; - digit_blanker_3 = digit_blanker_3 + 1; - digit_blanker_4 = digit_blanker_4 + 1; end if (led_digit_select_latch[2] == 0) begin led_display_bytes[2] = led_segment_bus_latch; - digit_blanker_1 = digit_blanker_1 + 1; - digit_blanker_2 = digit_blanker_2 + 1; digit_blanker_3 = 0; - digit_blanker_4 = digit_blanker_4 + 1; end if (led_digit_select_latch[3] == 0) begin led_display_bytes[3] = led_segment_bus_latch; - digit_blanker_1 = digit_blanker_1 + 1; - digit_blanker_2 = digit_blanker_2 + 1; - digit_blanker_3 = digit_blanker_3 + 1; digit_blanker_4 = 0; end
d64d218d	2019-04-29 03:09:28	Timothy Pearson
Fix incorrect pin assignment for 7-segment LED display
M fpga/serial/lattice/eb85/control_fpga.pcf M fpga/serial/lattice/eb85/ice40_remotefpga_test/guest_fpga.pcf
fpga/serial/lattice/eb85/control_fpga.pcf diff --git a/fpga/serial/lattice/eb85/control_fpga.pcf b/fpga/serial/lattice/eb85/control_fpga.pcf index a9a1a5e..2135ac9 100644 --- a/fpga/serial/lattice/eb85/control_fpga.pcf +++ b/fpga/serial/lattice/eb85/control_fpga.pcf @@ -107,8 +107,8 @@ set_io led_segment_bus[4] T5 set_io led_segment_bus[3] T6 set_io led_segment_bus[2] T7 -set_io led_segment_bus[1] P8 -set_io led_segment_bus[0] T10 +set_io led_segment_bus[1] T9 +set_io led_segment_bus[0] P8 set_io led_digit_select[3] T2 set_io led_digit_select[2] T3 fpga/serial/lattice/eb85/ice40_remotefpga_test/guest_fpga.pcf diff --git a/fpga/serial/lattice/eb85/ice40_remotefpga_test/guest_fpga.pcf b/fpga/serial/lattice/eb85/ice40_remotefpga_test/guest_fpga.pcf index dd59d7c..7507a2f 100644 --- a/fpga/serial/lattice/eb85/ice40_remotefpga_test/guest_fpga.pcf +++ b/fpga/serial/lattice/eb85/ice40_remotefpga_test/guest_fpga.pcf @@ -97,8 +97,8 @@ set_io led_segment_bus[4] T5 set_io led_segment_bus[3] T6 set_io led_segment_bus[2] T7 -set_io led_segment_bus[1] P8 -set_io led_segment_bus[0] T10 +set_io led_segment_bus[1] T9 +set_io led_segment_bus[0] P8 set_io led_digit_select[3] T2 set_io led_digit_select[2] T3
9db454fa	2019-04-29 03:24:04	Timothy Pearson
Slow demo file 7-segment clock to a more reasonable KHz value
M fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v
fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v diff --git a/fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v b/fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v index 3c7fa0f..44b1ff5 100644 --- a/fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v +++ b/fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v @@ -1,104 +1,104 @@ -// This file is part of the Universal Laboratory (uLab) -// -// © 2007 - 2019 Raptor Engineering, LLC -// All Rights Reserved -// -// Licensed under the terms of the AGPL v3 - -module guest_fpga_top(clk, reset, four_bit_input, four_bit_output, eight_bit_input, eight_bit_output, sixteen_bit_input, sixteen_bit_output, lcd_data_in_address, lcd_data_in_data, lcd_data_in_enable, led_segment_bus, led_digit_select); - input clk; - input reset; - - input [3:0] four_bit_input; - output reg [3:0] four_bit_output; - input [7:0] eight_bit_input; - output reg [7:0] eight_bit_output; - input [15:0] sixteen_bit_input; - output reg [15:0] sixteen_bit_output; - - output reg [5:0] lcd_data_in_address; - output reg [7:0] lcd_data_in_data; - output reg lcd_data_in_enable; - - output reg [7:0] led_segment_bus; - output reg [3:0] led_digit_select; - - reg [7:0] lcd_sample_counter = 48; // Create a sample LCD display counter register - reg [31:0] lcd_character_change_timer = 0; // Wait a certain number of cycles before loading a new character - reg [5:0] lcd_current_character = 0; // The current character's address - - always @(posedge clk) begin - four_bit_output = four_bit_input; // Loopback - eight_bit_output = eight_bit_input[3:0] + eight_bit_input[7:4]; // Sample adder - sixteen_bit_output = sixteen_bit_input[15:8] * sixteen_bit_input[7:0]; // Sample multiplier - - // Sample LCD display routine - lcd_data_in_address = lcd_current_character; // Character location on the LCD display - lcd_data_in_data = lcd_sample_counter; // Character code to display - lcd_data_in_enable = 1; // Enable data transmission - - // Cycle through all character positions - lcd_current_character = lcd_current_character + 1; - if (lcd_current_character > 31) begin - lcd_current_character = 16; - end - - // Cycle through the numbers 0 to 9 at one second intervals - lcd_character_change_timer = lcd_character_change_timer + 1; - if (lcd_character_change_timer > 6000000) begin // Wait one second in between character changes - lcd_character_change_timer = 0; - lcd_sample_counter = lcd_sample_counter + 1; - if (lcd_sample_counter > 57) begin // Character code for the digit 9 - lcd_sample_counter = 48; // Character code for the digit 0 - end - end - end - - // 7-segment LED display driver clock generator - reg sseg_clock; - reg [4:0] sseg_clock_counter; - - always @(posedge clk) begin - sseg_clock_counter = sseg_clock_counter + 1; - if (sseg_clock_counter > 16) begin - sseg_clock_counter = 0; - sseg_clock = ~sseg_clock; - end - end - - // 7-segment LED display driver - // led_segment_bus and led_digit_select are active low - // The bit sequence, MSB to LSB, is dp a b c d e f g - // Segment letters are taken from ug130.pdf page 15 - - // 0: 8'b10000001 - // 1: 8'b11001111 - // 2: 8'b10010010 - // 3: 8'b10000110 - reg [2:0] current_anode; - always @(posedge sseg_clock) begin - current_anode = current_anode + 1; - if (current_anode > 3) begin - current_anode = 0; - end - - case (current_anode) - 0: begin - led_digit_select = 4'b1110; - led_segment_bus = 8'b10000001; - end - 1: begin - led_digit_select = 4'b1101; - led_segment_bus = 8'b11001111; - end - 2: begin - led_digit_select = 4'b1011; - led_segment_bus = 8'b10010010; - end - 3: begin - led_digit_select = 4'b0111; - led_segment_bus = 8'b10000110; - end - endcase - end -endmodule +// This file is part of the Universal Laboratory (uLab) +// +// © 2007 - 2019 Raptor Engineering, LLC +// All Rights Reserved +// +// Licensed under the terms of the AGPL v3 + +module guest_fpga_top(clk, reset, four_bit_input, four_bit_output, eight_bit_input, eight_bit_output, sixteen_bit_input, sixteen_bit_output, lcd_data_in_address, lcd_data_in_data, lcd_data_in_enable, led_segment_bus, led_digit_select); + input clk; + input reset; + + input [3:0] four_bit_input; + output reg [3:0] four_bit_output; + input [7:0] eight_bit_input; + output reg [7:0] eight_bit_output; + input [15:0] sixteen_bit_input; + output reg [15:0] sixteen_bit_output; + + output reg [5:0] lcd_data_in_address; + output reg [7:0] lcd_data_in_data; + output reg lcd_data_in_enable; + + output reg [7:0] led_segment_bus; + output reg [3:0] led_digit_select; + + reg [7:0] lcd_sample_counter = 48; // Create a sample LCD display counter register + reg [31:0] lcd_character_change_timer = 0; // Wait a certain number of cycles before loading a new character + reg [5:0] lcd_current_character = 0; // The current character's address + + always @(posedge clk) begin + four_bit_output = four_bit_input; // Loopback + eight_bit_output = eight_bit_input[3:0] + eight_bit_input[7:4]; // Sample adder + sixteen_bit_output = sixteen_bit_input[15:8] * sixteen_bit_input[7:0]; // Sample multiplier + + // Sample LCD display routine + lcd_data_in_address = lcd_current_character; // Character location on the LCD display + lcd_data_in_data = lcd_sample_counter; // Character code to display + lcd_data_in_enable = 1; // Enable data transmission + + // Cycle through all character positions + lcd_current_character = lcd_current_character + 1; + if (lcd_current_character > 31) begin + lcd_current_character = 16; + end + + // Cycle through the numbers 0 to 9 at one second intervals + lcd_character_change_timer = lcd_character_change_timer + 1; + if (lcd_character_change_timer > 6000000) begin // Wait one second in between character changes + lcd_character_change_timer = 0; + lcd_sample_counter = lcd_sample_counter + 1; + if (lcd_sample_counter > 57) begin // Character code for the digit 9 + lcd_sample_counter = 48; // Character code for the digit 0 + end + end + end Diff limit reached (max: 250 lines)
eb6afe10	2019-04-29 03:24:30	Timothy Pearson
Add a several cycle "dead zone" to 7-segment decoder segment select lines to more accurately emulate real hardware
M fpga/serial/common/remote_access.v
Diff limit reached (max: 250 lines)

Branch: master

fpga/serial/common/remote_access.v

fpga/serial/lattice/eb85/control_fpga.pcf

fpga/serial/lattice/eb85/ice40_remotefpga_test/guest_fpga.pcf

fpga/serial/lattice/eb85/ice40_remotefpga_test/main.v